The Nontrivial Problem of Matching in Redundant Digital Systems

Abstract

Massive hardware redundancy is a widely used technique to enhance the reliability of digital systems. Most of authors involved in this topic make a crucial assumption in their published works: in faultfree operation the outputs of such hardware systems are perfectly synchronized in time and completely equal (match in all). This paper proves that the matching problem is not so trivial in complex digital systems. The main bottlenecks of matching in last generation technolog-basedy redundant digital systems is evidenced and discussed. In order to support the unfolded theoretical approaches, a Field Programmable Gate Array (FPGA) processors-based redundant digital system implementation example is presented and analyzed. The experiments prove that the matching problem in such systems is a difficult engineering undertaking. Because to achieve completely equal outputs looks a hardly-to-achieve scientific goal, for these situations an accessible solution is proposed and recommended.

Keywords

• redundancy
• matching
• FPGA processor
• reconfigurable hardware technology