Engineering Science and Technology, an International Journal (Jun 2019)
Modelling and hardware implementation of quantization levels of digital cameras in DCT based image compression
Abstract
In today’s world of computation, data compression takes vigorous part in most of the real–time and embedded system applications. Some of such end uses are essentially derived for specific task, however their realization are not described and delineated. To bridge this variance, an attempt is made to experimentally present an evidence behind usage of vector quantization levels of 50 in popular digital cameras, generating other vector quantization levels. This has been incorporated to reduce the trade–off between quality and size of reconstructed images by the use of vector quantization levels less than quantization level of 50. The prime objective of the work encompasses the generation of vector quantization levels from 10 to 75 for digital cameras in Discrete Cosine Transform (DCT) based image compression and analyzing the performance of proposed algorithm efficiency through parameters such as Mean Square Error (MSE), Peak Signal to Noise Ratio (PSNR), Compression Ratio (CR), Bits per Pixel (bpp) and percentage Space Saving by applying it to standard test images. In this exploration, vector quantization level of four digital cameras namely Canon PowerShot A700 (Superfine), Fuji FinePix A700 (Fine), Nikon CoolPix P5000 (Fine) and Sony Digital Single Lens Reflex (DSLR) A700 (Fine) have been used. The experiment is also featured with the modeling and deploying of algorithm onto BeagleBone Black, Raspberry Pi low cost hardware devices along with presenting the comparative performance evaluation amongst cameras considered. Keywords: DCT, Vector quantization, Digital camera, BeagleBone Black, Raspberry Pi