An Improved Modulation Method for Parallel Three-Level Rectifiers With Circulating Current Mitigation

Abstract

An improved modulation method is proposed for two parallel three-level interleaved rectifiers to reduce current harmonics and high-frequency zero-sequence circulating current, which uses sinusoidal pulse width modulation. First, a model of the two parallel rectifiers is constructed, and the main factor affecting the line current performance and zero-sequence circulating current is discussed. Second, the current harmonics are the priority optimization target to guarantee better line current performance. Finally, an exchange of the large common-mode voltage between two converters is made to reduce the high frequency zero-sequence circulating current based on the low current harmonics. Performance comparisons between the proposed method and existing methods in terms of total current harmonics, zero-sequence circulating current value and switching loss are made in the experiment, which confirm the effectiveness of the proposed method.

Keywords

• AC-DC power converters
• closed loop systems
• electrical engineering
• multilevel converters
• power industry
• power conversion harmonics