Development of technology and design platforms at topological norms less than 90 nm

Abstract

The article discusses Moore’s law, which has had a significant impact on the development of microelectronics, allowing us to evaluate parameters such as the performance of microprocessors and the clock frequency of digital circuits. However, the transition to technological standards of less than 100 nm has led to new problems in the production and design of chips. The article also discusses changes in integrated circuit design tools, ranging from manual creation of topological layers to modern automated systems capable of solving complex problems of logical modeling and analysis of chip parameters. The issues of the development of design technology at topological standards of 90nm are considered.