Mechanism of gate voltage spike under digital gate control at IGBT switching operations

Abstract

This paper reports the mechanism of gate voltage spike in the turn-off operation by a digital gate control. In the previous work, it was clarified that the gate voltage spike Vg_spike was generated by parasitic inductance and a large gate current change due to the digital gate control. However, the main cause of resonance leading to Vg_spike generation has never been clear. Three types of IGBT modules, which have the same gate inductance and different input capacitance, were tested under three-step digital gate control. It was found that the Vg_spike was independent of input capacitance in IGBT. As for the stray capacitance in the digital gate driver, external capacitors Cex were connected in parallel with the gate driver, and the Vg_spike decreased with increasing Cex. Furthermore, the second vector of the digital control, which was applied for suppressing the overshoot in collector-emitter voltage by a small value, needed to be set as a large value to suppress the Vg_spike. From these results, output impedance of gate driver is a key factor for the Vg_spike, and the second vector must be optimized for not only the collector voltage overshoot but also Vg_spike suppression for safety operation.

Keywords

• IGBT modules
• Digital gate driver
• Stray capacitance
• Gate voltage spike