Motorcycle detection based on deep learning implemented on FPGA

Abstract

This paper proposes a hardware accelerator design for motorcycle detection based on deep learning. We designed the training parameters by K-means algorithm and created the motorcycle dataset from Thailand's urban scene. Due to the rapid evolution of deep learning and the need for high-performance, low-power, and scalable models for application platforms, we designed the YOLOv2 accelerator architecture on the PYNQ platforms by using five optimization methods, including loop unrolling/pipeline, loop tiling, data quantization, memory ping-pong, and multi-channel data transmission. The proposed training parameters can increase the accuracy from the original 76.8% to 89.45%. The hardware experimental results obtained 14.10 GOP/s (100MHz) and 25.98 GOP/s (150MHz) on the PYNQ (ZYNQ 7020). The performance of the acceleration platform that we designed is 6.32 times faster than that of the CPU (i7), and the energy consumption is 1/26 of the CPU. In addition, the hardware accelerated deep learning applications have in recent years improved a lot in accuracy and calculation speed.

Keywords

• motorcycle detection
• deep learning
• yolov2
• fpga
• high-level synthesis