A D-Band Power Amplifier in 65-nm CMOS by Adopting Simultaneous Output Power-and Gain-Matched <italic>Gmax</italic>-Core

Abstract

This paper proposes a simultaneous output power- and gain-matching technique in a sub-THz power amplifier (PA) design based on a maximum achievable gain ( $G_{max}$ ) core. The optimum combination of three-passive-elements-based embedding networks for implementing the $G_{max}$ -core is chosen considering the small- and large-signal performances at the same time. By adopting the proposed technique, the simultaneous output power- and gain-matching can be achieved, maximizing the small-signal power gain and large-signal output power simultaneously. A 150 GHz single-ended two-stage PA without power combining circuit is implemented in a 65-nm CMOS process based on the proposed technique. The amplifier achieves a peak power gain of 17.5 dB, peak power added efficiency (PAE) of 13.3 and 16.1 %, saturated output power ( $P_{sat}$ ) of 10.3 and 9.4 dBm, and DC power consumption of 86.3 and 52.4 mW, respectively, under the bias voltage of 1.2 and 1 V, which corresponds to the highest PAE, gain per stage and $P_{out}$ per single transistor among other reported CMOS D-band PAs.

Keywords

• Amplifier
• power amplifier
• CMOS
• gain-boosting
• Gmax)%22%2C%22default_operator%22%3A%22AND%22%7D%7D%7D"> maximum achievable gain (<italic xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">Gmax</italic>)
• terahertz (THz)