Hybrid Segmentation Approach for Digital Circuits in Pseudo Exhaustive Testing

Abstract

In the pseudo-exhaustive testing, the main hardware cost is based on inserting required segmentation cells to properly segment digital circuits. In this paper, the efficient hybrid approach to segment digital circuits is presented for segmentation cell reduction. This approach can adapt different topologies of digital circuits using several heuristic procedures. It is mainly based on the hybrid selection of candidate nodes that segmentation cells are inserted after them. In addition, the adapted global, limited global, and local effects used in the hybrid heuristic procedures evaluate the effect of candidate nodes with respect to particular nodes in their fan-out cone. The hybrid segmentation approach (HSA) is compared with all previously published approaches using the benchmark circuits. The best results illustrate the superiority of the HSA presented in this paper. In addition, the HSA has linear relationship between the number of segmentation cells and the values of the cone size reduction between 16 and 32 for all benchmark circuits, considered the added enhancement over the other previously approaches.

Keywords

• segmentations of digital circuits
• partitioning of digital circuits
• design for testability of digital vlsi circuits
• pseudo-exhaustive testing