IEEE Access (Jan 2024)

Design of High-Robustness LDO Regulator With Floating SCR Based ESD Protection Circuit Using High Gain Buffer

  • Sang-Wook Kwon,
  • Kyoung-Il Do,
  • Jeong-Min Lee,
  • U-Yeol Seo,
  • Yong-Seo Koo

DOI
https://doi.org/10.1109/ACCESS.2024.3371900
Journal volume & issue
Vol. 12
pp. 33555 – 33568

Abstract

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Currently, in the semiconductor market, reliability response to Electro Static Discharge (ESD) situations is being discussed as an alternative to internal Integrated Circuit (IC) destruction. In this paper, the ESD protection circuit design integrated into the Low Drop Out (LDO) regulator presents an alternative to the reliability of the internal IC. Additionally, the LDO regulator proposed in this paper is designed to minimize output voltage changes by significantly improving gain using a high gain buffer structure. Undershoot and overshoot were effectively regulated by utilizing a high gain buffer. Under the conditions of an input voltage range of 3.3–4.5 V, a maximum load current of 400 mA, and an output voltage of 3 V, the output of the proposed LDO regulator with a high gain buffer structure kept at the undershoot and overshoot voltages of 32 mV and 36 mV, respectively. In addition, the ESD protection circuit used so far was designed with only a single diode, but the proposed ESD protection circuit is a new structure designed based on Silicon Controlled Rectifier (SCR). The proposed ESD protection circuit has an incomparable area efficiency compared to diodes.

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