Frontiers in Neuroscience (Mar 2011)

On Spike-Timing-Dependent-Plasticity, Memristive Devices, and building a Self-Learning Visual Cortex

  • Bernabe eLinares-Barranco,
  • Teresa eSerrano-Gotarredona,
  • Luis A. Camuñas-Mesa,
  • Jose A. Perez-Carrasco,
  • Carlos eZamarreño-Ramos,
  • Timothee eMasquelier

DOI
https://doi.org/10.3389/fnins.2011.00026
Journal volume & issue
Vol. 5

Abstract

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In this paper we present a very exciting overlap between emergent nano technologyand neuroscience. We are linking one type of memristor nano technology devices to the biological synaptic updaterule known as Spike-Time-Dependent-Plasticity found in real biological synapses.Understanding this link allows neuromorphic engineers to develop circuit architecturesthat use this type of memristors to artificially emulate parts of the visual cortex. We focus on the type of memristors referred to as voltage driven memristors andfocus our discussions on a behavioral macro model for such devices.The implementationsresult in fully asynchronous architectures with neurons sending their action potentials notonly forwards but also backwards. One criticalaspect is to use neurons that generate spikes of specific shapes. By changing the shapes of the neuron action potential spikes we can tune and manipulatethe STDP learning rules for both excitatory and inhibitory synapses. We show howneurons and memristors can be interconnected to achieve large scale spiking learning systems,that follow a type of multiplicative STDP learning rule. We briefly extend the architecturesto use three-terminal transistors with similar memristive behavior.We illustrate how a V1 visual cortex layer can assembled and how it iscapable of learning to extract orientations from visual data coming from a real artificialCMOS spiking retina observing real life scenes. Finally, we discuss limitationsof currently available memristors.The results presented are based on behavioral simulations and do not take intoaccount non-idealities of devices and interconnects. The aim of this paper is to present, ina tutorial manner, aninitial framework for the possible development of fully asynchronous STDP learning neuromorphic architecturesexploiting two or three terminal memristive type devices. All files used for the simulations are made available through the journal web site.

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