Fast and Reconfigurable Logic Synthesis in Memristor Crossbar Array

Abstract

Memristor is a potential basic unit for the in‐memory computing system, which is an approach to break the memory wall of the traditional computer. However, low switching speed, nonuniform device characteristics, and inefficient logic synthesis hinder the development of memristor‐based in‐memory computing. Herein, a novel Cu/α‐Si/α‐C/Pt memristor and direct resistance‐coupling logic synthesis scheme to construct high‐efficiency in‐memory computing is presented. The memristor shows excellent uniformity of low/high resistance (relative dispersion σ/μ = 4.68% and 3.28%) and SET/RESET voltage (relative dispersion σ/μ = 3.24% and 5.85%), fast switching speed (≈30 ns), good endurance (>108), and long retention (>105 s at 100 °C). Complete set of Boolean logic and some derived logic operators are efficiently implemented in the Cu/α‐Si/α‐C/Pt crossbar array. Furthermore, the reconfigurable and parallel logic synthesis is experimentally demonstrated by one‐bit full adder and parallel copy operation. This work can greatly improve the logic computing efficiency and flexibility in the memristor crossbar array.

Keywords

• in-memory computing
• memristors
• resistance coupling