Enhancing Pixel Charging Efficiency by Optimizing Thin-Film Transistor Dimensions in Gate Driver Circuits for Active-Matrix Liquid Crystal Displays

Abstract

Flat panel displays are electronic displays that are thin and lightweight, making them ideal for use in a wide range of applications, from televisions and computer monitors to mobile devices and digital signage. The Thin-Film Transistor (TFT) layer is responsible for controlling the amount of light that passes through each pixel and is located behind the liquid crystal layer, enabling precise image control and high-quality display. As one of the important parameters to evaluate the display performance, the faster response time provides more frames in a second, which benefits many high-end applications, such as applications for playing games and watching movies. To further improve the response time, the single-pixel charging efficiency is investigated in this paper by optimizing the TFT dimensions in gate driver circuits in active-matrix liquid crystal displays. The accurate circuit simulation model is developed to minimize the signal’s fall time (Tf) by optimizing the TFT width-to-length ratio. Our results show that using a driving TFT width of 6790 μm and a reset TFT width of 640 μm resulted in a minimum Tf of 2.6572 μs, corresponding to a maximum pixel charging ratio of 90.61275%. These findings demonstrate the effectiveness of our optimization strategy in enhancing pixel charging efficiency and improving display performance.

Keywords

• thin-film transistors (TFTs)
• active-matrix liquid crystal displays (AMLCD)
• pixel charging ratio
• gate driver on array (GOA) circuit