The Trapping Mechanism at the AlGaN/GaN Interface and the Turn-On Characteristics of the p-GaN Direct-Coupled FET Logic Inverters
Junfeng Yu,
Jihong Ding,
Tao Wang,
Yukai Huang,
Wenzhang Du,
Jiao Liang,
Hongping Ma,
Qingchun Zhang,
Liang Li,
Wei Huang,
Wei Zhang
Affiliations
Junfeng Yu
State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China
Jihong Ding
East China Institute of Photo-Electron IC, Bengbu 233000, China
Tao Wang
National Key Laboratory of Integrated Circuits and Microsystems, Wuxi 214035, China
Yukai Huang
State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China
Wenzhang Du
State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China
Jiao Liang
Institute of Wide Bandgap Semiconductors and Future Lighting, Academy for Engineering & Technology, Fudan University, Shanghai 200433, China
Hongping Ma
Institute of Wide Bandgap Semiconductors and Future Lighting, Academy for Engineering & Technology, Fudan University, Shanghai 200433, China
Qingchun Zhang
Institute of Wide Bandgap Semiconductors and Future Lighting, Academy for Engineering & Technology, Fudan University, Shanghai 200433, China
Liang Li
School of Electronic Information Engineering, Suzhou Vocational University, Suzhou 215104, China
Wei Huang
State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China
Wei Zhang
State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China
The trapping mechanism at the AlGaN/GaN interface in the p-GaN high electron mobility transistors (HEMTs) and its impact on the turn-on characteristics of direct-coupled FET logic (DCFL) inverters were investigated across various supply voltages (VDD) and test frequencies (fm). The frequency-conductance method identified two trap states at the AlGaN/GaN interface (trap activation energy Ec-ET ranges from 0.345 eV to 0.363 eV and 0.438 eV to 0.47 eV). As VDD increased from 1.5 V to 5 V, the interface traps captured more electrons, increasing the channel resistance (Rchannel) and drift-region resistance (Rdrift) of the p-GaN HEMTs and raising the low-level voltage (VOL) from 0.56 V to 1.01 V. At fm = 1 kHz, sufficient trapping and de-trapping led to a delay of 220 µs and a VOL instability of 320 mV. Additionally, as fm increased from 1 kHz to 200 kHz, a positive shift in the threshold voltage of p-GaN HEMTs occurred due to the dominance of trapping. This shift caused VOL to rise from 1.02 V to 1.40 V and extended the fall time (tfall) from 153 ns to 1 µs. This investigation enhances the understanding of DCFL GaN inverters’ behaviors from the perspective of device physics on power switching applications.
