Радіоелектронні і комп'ютерні системи (Nov 2020)

AUTOMATON MODEL, DEVICE SYNTHESIS AND ADAPTIVE SUBSTITUTION ALGORITHM FOR CACHE MEMORY

  • Вадим Олексійович Пуйденко

DOI
https://doi.org/10.32620/reks.2020.4.06
Journal volume & issue
Vol. 0, no. 4
pp. 68 – 78

Abstract

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The probability indicators of the hits or misses events have conditioned the application of the certain substitution policies in the associative cache and the associative translation look-a-side buffer. The implementation of combined substitution policies can improve cache memory and cache buffer performance in general by the interoperability of algorithms with unidirectional or multidirectional substitution policies with the ability to switch from one policy to another. Adaptation of substitution algorithms is based on the compatibility of algorithms according to several characteristics, such as substitution policy, productivity, and implementation complexity. All listed characteristics are summarized in the corresponding table and they are allowed to create the construction for the so-called compatibility matrix, which allows observing not only pairs of compatible algorithms, but also their triads. The substitution policy of the adaptive algorithms extends as to the associative cache memory as to the associative translation look-a-side buffer of the processor core. In the paper, the automaton model of an adaptive algorithm was built and was created by a pair of compatible algorithms. On the one side, the substitution policy algorithm policy should rely on finding and replacing the least recently used or least frequently used element of the addressed set of the data unit. On the other side, this policy may occur in searching and replacing the most recently used or most frequently used element in the addressed set of a data unit. The automaton model is described by the corresponding discrete functions and structural block diagrams of algorithms. The automaton model was created and algorithmized and was the reason for the synthesis of adaptive algorithm hardware for q – directional associative cache memory and associative translation look-a-side buffer. The synthesis was based on the mathematical apparatus of combinatorial synthesis for determining the enabling conditions for selecting q - directions. The result of the synthesis was the logic model of a selection of q – directions according to an adaptive algorithm with the corresponding hardware solution.

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