Design and post-silicon verification of polymorphic PCIE bridge expansion chip

Abstract

As a mainstream bus protocol, the application scenarios of PCIE(Peripheral Component Interconnect Express) bus are more and more abundant, and the peripheral devices connected on the bus are also increasing. On both desktop and embedded general-purpose processors, the number of PCIE controllers is limited, and the functions of many PCIE bridge chips are also very limited. A polymorphic PCIE expansion bridge chip is designed to extend the processor's processing capability. The chip's multi-channel, high-throughput, polymorphic attributes effectively make up for the shortcomings of the traditional PCIE processor. The scheme determines the feasibility and the stability of the chip through the post-silicon verification method, and also provides a designed idea suitable for the follow-up PCIE extended chip.

Keywords

• pcie bridge
• functional verification
• polymorphism
• chip
• chip design