Hierarchical Attention Module-Based Hotspot Detection in Wafer Fabrication Using Convolutional Neural Network Model

Abstract

Wafer mappings (WM) help diagnose low-yield issues in semiconductor production by offering vital information about process anomalies. As integrated circuits continue to grow in complexity, doing efficient yield analyses is becoming more essential but also more difficult. Semiconductor manufacturers require constant attention to reliability and efficiency. Using the capabilities of convolutional neural network (CNN) models improved by hierarchical attention module (HAM), wafer hotspot detection is achieved throughout the fabrication process. In an effort to achieve accurate hotspot detection, this study examines a variety of model combinations, including CNN, CNN+long short-term memory (LSTM) LSTM, CNN+Autoencoder, CNN+artificial neural network (ANN), LSTM+HAM, Autoencoder+HAM, ANN+HAM, and CNN+HAM. Data augmentation strategies are utilized to enhance the model’s resilience by optimizing its performance on a variety of datasets. Experimental results indicate a superior performance of 94.58% accuracy using the CNN+HAM model. K-fold cross-validation results using 3, 5, 7, and 10 folds indicate mean accuracy of 94.66%, 94.67%, 94.66%, and 94.66%, for the proposed approach, respectively. The proposed model performs better than recent existing works on wafer hotspot detection. Performance comparison with existing models further validates its robustness and performance.

Keywords

• Wafer hotspot detection
• hierarchical attention module
• autoencoder
• data augmentation
• hybrid attention module
• deep learning