On-chip optical parity checker using silicon photonic integrated circuits
Liu Zilong,
Wu Xiaosuo,
Xiao Huifu,
Han Xu,
Chen Wenping,
Liao Miaomiao,
Zhao Ting,
Jia Hao,
Yang Jianhong,
Tian Yonghui
Affiliations
Liu Zilong
Institute of Microelectronics and Key Laboratory for Magnetism and Magnetic Materials of MOE, School of Physical Science and Technology, Lanzhou University, Lanzhou 730000, Gansu, China
Wu Xiaosuo
Institute of Microelectronics and Key Laboratory for Magnetism and Magnetic Materials of MOE, School of Physical Science and Technology, Lanzhou University, Lanzhou 730000, Gansu, China
Xiao Huifu
Institute of Microelectronics and Key Laboratory for Magnetism and Magnetic Materials of MOE, School of Physical Science and Technology, Lanzhou University, Lanzhou 730000, Gansu, China
Han Xu
Institute of Microelectronics and Key Laboratory for Magnetism and Magnetic Materials of MOE, School of Physical Science and Technology, Lanzhou University, Lanzhou 730000, Gansu, China
Chen Wenping
Institute of Microelectronics and Key Laboratory for Magnetism and Magnetic Materials of MOE, School of Physical Science and Technology, Lanzhou University, Lanzhou 730000, Gansu, China
Liao Miaomiao
Institute of Microelectronics and Key Laboratory for Magnetism and Magnetic Materials of MOE, School of Physical Science and Technology, Lanzhou University, Lanzhou 730000, Gansu, China
Zhao Ting
Institute of Microelectronics and Key Laboratory for Magnetism and Magnetic Materials of MOE, School of Physical Science and Technology, Lanzhou University, Lanzhou 730000, Gansu, China
Jia Hao
Institute of Microelectronics and Key Laboratory for Magnetism and Magnetic Materials of MOE, School of Physical Science and Technology, Lanzhou University, Lanzhou 730000, Gansu, China
Yang Jianhong
Institute of Microelectronics and Key Laboratory for Magnetism and Magnetic Materials of MOE, School of Physical Science and Technology, Lanzhou University, Lanzhou 730000, Gansu, China
Tian Yonghui
Institute of Microelectronics and Key Laboratory for Magnetism and Magnetic Materials of MOE, School of Physical Science and Technology, Lanzhou University, Lanzhou 730000, Gansu, China
The optical parity checker plays an important role in error detection and correction for high-speed, large-capacity, complex digital optical communication networks, which can be employed to detect and correct the error bits by using a specific coding theory such as introducing error-detecting and correcting codes in communication channels. In this paper, we report an integrated silicon photonic circuit that is capable of implementing the parity checking for binary string with an arbitrary number of bits. The proposed parity checker consisting of parallel cascaded N micro-ring resonators (MRRs) is based on directed logic scheme, which means that the operands applied to MRRs to control the switching states of the MRRs are electrical signals, the operation signals are optical signals, and the final operation results are obtained at the output ports in the form of light. A 3-bit parity checker with an operation speed of 10 kbps, fabricated on a silicon-on-insulator (SOI) platform using a standard commercial complementary metal-oxide-semiconductor (CMOS) process, was experimentally and successfully demonstrated.
