Electronics (Mar 2023)

A −31.7 dBm Sensitivity 0.011 mm<sup>2</sup> CMOS On-Chip Rectifier for Microwave Wireless Power Transfer

  • Takuma Hashimoto,
  • Hikaru Nekozuka,
  • Yoshitaka Toeda,
  • Masayuki Otani,
  • Yasuhiko Fukuoka,
  • Toru Tanzawa

DOI
https://doi.org/10.3390/electronics12061400
Journal volume & issue
Vol. 12, no. 6
p. 1400

Abstract

Read online

This paper pursued both the lower operating power limit and small area of on-chip rectifiers for microwave wireless power transfer (MWPT). RF–DC charge pump rectifiers can operate in the fast switching limit at a high frequency of 920 MHz even with a small stage capacitor Cin of 100 fF, which contributes to an area reduction in the on-chip rectifiers. Circuit design starts with Cin determined as small as possible, followed by the determination of switching transistors and the number of stages. Even at an extremely low input power of 1 μW, wiring resistance in RF inputs is critical. Routing of the RF inputs is designed in line with stage capacitors. Bonding pad structure also affects the lower input power limit. Ground-shielded pad design can reduce the lower limit. Various types of RF–DC charge pump rectifiers are fabricated in 65 nm CMOS. An ultra-low-power diode RF–DC charge pump rectifier with 32 stages had a lower input power limit of −31.7 dBm at an output voltage of 1.0 V. Its small silicon area of 0.011 mm2 allows RF–DC rectifiers to be integrated in sensor ICs. More advanced technology providing MIM capacitors with higher capacitance density and placing switching MOSFETs under the MIM capacitors will further reduce the area of RF–DC charge pump rectifiers, allowing them to be integrated in sensor ICs.

Keywords