Effect of Drain Induced Barrier Enhancement on Subthreshold Swing and OFF-State Current of Short Channel MOSFETs: A TCAD Study

Abstract

In this paper, with the help of calibrated 2-D simulations, we report a detailed study on the effect of drain induced barrier enhancement on the subthreshold swing and OFF-state current of a short channel MOSFET. We demonstrate that the presence of gate-on-drain overlap in a short channel MOSFET leads to drain induced barrier enhancement (DIBE). We show that as a result of DIBE, a MOSFET can achieve near ideal subthreshold swing, diminished DIBL, constant threshold voltage and improved $\text{I}_{\mathrm {ON}}/\text{I}_{\mathrm {OFF}}$ ratio at room temperature, without being affected by channel length variations.

Keywords

• Drain induced barrier enhancement (DIBE)
• drain induced barrier lowering (DIBL)
• gate-on-drain overlap
• leakage current
• MOSFET
• scaling