IEEE Access (Jan 2023)

An Optimized Vertical GaN Parallel Split Gate Trench MOSFET Device Structure for Improved Switching Performance

  • Nilesh Kumar Jaiswal,
  • V. N. Ramakrishnan

DOI
https://doi.org/10.1109/ACCESS.2023.3265477
Journal volume & issue
Vol. 11
pp. 46998 – 47006

Abstract

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This work proposes a vertical gallium nitride (GaN) parallel split gate trench MOSFET (PSGT-MOSFET) device architecture suitable for power conversion applications. Wherein two parallel gates, and a field plate are introduced vertically on the sidewalls and connected, respectively, to the gate and source. Technology computer-aided design (TCAD) simulator was used in the design process to achieve a specific on-resistance as low as 0.79 $\text{m}\Omega $ .cm2 for the device, which has the capacity of blocking voltages up to 600 V. The peak electric field of the PSGT-MOSFET could well be lowered to 2.95 MV/cm, which is about 17% lower than that of a conventional trench gate MOSFET (TG-MOSFET) near the trench corner with help of suitable design and optimization of trench depth, drift doping, and field plate thickness. The TCAD simulation shows that the higher drift doping on the device performance of PSGT-MOSFET produces $\sim 2\times $ lower switching losses when compared with a similarly rated conventional TG-MOSFET device.

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