All-Pass Filter IC Design and Its Cascaded Second-Order and Third-Order All-Pass Filters and Quadrature Sinusoidal Oscillator Applications

Abstract

This study presents the design and application of a cascaded voltage-mode (VM) first-order all-pass filter (APF) integrated circuit (IC) based on a positive differential current conveyor (DDCC+). The proposed single- and differential-input VM-APF uses two DDCC+ active components and two passive components consisting of a grounded capacitor and a resistor. Both non-inverting APF (NAPF) and inverting APF (IAPF) transfer functions of VM-APF can be implemented without any critical passive component matching condition. The proposed first-order VM-APF can realize both NAPF and IAPF transfer functions with high-input and low-output (HILO) impedance, which makes it suitable for cascading without any voltage buffer. Owing to the VM-APF with HILO impedance configuration, the proposed circuit can quickly cascade nth-order VM-APF without adding additional circuit architectures. The circuit is implemented on-chip based on TSMC 1P6M 180 nm process technology with a supply voltage of ±0.9 V. The first-order VM-APF power consumption is 1.8 mW. Integrating a first-order VM-APF into a single chip can improve system integration efficiency, reduce voltage and power consumption, and shrink circuit size. On-chip measurements verify the cascading feasibility of the proposed first-order VM-APF and demonstrate that the implemented chip can be easily cascaded for second- and third-order VM-APFs and VM APF-based quadrature sinusoidal oscillator applications.

Keywords

• CMOS chip
• filters
• circuit design
• analogue signal processing