Low‐power multi‐band injection‐locked wireless receiver in 0.13 μm CMOS

Abstract

Abstract The design and analysis of a low‐power multi‐band injection‐locked wireless receiver, implemented in complementary metal–oxide–semiconductor (CMOS) 130 nm technology, for wireless sensor network (WSN) applications are presented. The proposed receiver composed of an injection‐locked oscillator (ILO), low‐noise amplifier (LNA), and an envelope detector utilizes non‐coherent detection based on the frequency‐to‐amplitude conversion property of the injection‐locking phenomena. A lock range enhancement method is proposed through analytically and numerically determining the optimum biasing point of the injection transistor. The lock range of divide‐by‐4 super‐harmonic injection‐locking dictated by the third‐order non‐linear coefficient of the injection transistor is first investigated. The receiver applies divide‐by‐4, divide‐by‐2, and fundamental injection to demodulate the frequency‐shift‐key (FSK) and ON/OFF‐key (OOK) modulated signals from 433, 860–868, 902–928, 950–956, and 2360–2400 MHz frequency bands while keeping the power consumption in sub‐mW range. Post‐layout simulation results demonstrate that the proposed design achieves a maximum data rate of 5 Mbps for both FSK and OOK signals. With two modes of operation (high‐band and low‐band), the receiver consumes 762 and 675 μW of static power from a 0.7 V supply, achieving a sensitivity of −77 and −70 dBm at BER of 2 × 10−3. The FOMs for each mode are 152 and 135 pJ/b, respectively.

Keywords

• amplitude shift keying
• CMOS integrated circuits
• frequency shift keying
• injection locked oscillators
• low noise amplifiers
• low‐power electronics