Scientific Reports (May 2024)

Highly-integrable analogue reservoir circuits based on a simple cycle architecture

  • Yuki Abe,
  • Kazuki Nakada,
  • Naruki Hagiwara,
  • Eiji Suzuki,
  • Keita Suda,
  • Shin-ichiro Mochizuki,
  • Yukio Terasaki,
  • Tomoyuki Sasaki,
  • Tetsuya Asai

DOI
https://doi.org/10.1038/s41598-024-61880-z
Journal volume & issue
Vol. 14, no. 1
pp. 1 – 10

Abstract

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Abstract Physical reservoir computing is a promising solution for accelerating artificial intelligence (AI) computations. Various physical systems that exhibit nonlinear and fading-memory properties have been proposed as physical reservoirs. Highly-integrable physical reservoirs, particularly for edge AI computing, has a strong demand. However, realizing a practical physical reservoir with high performance and integrability remains challenging. Herein, we present an analogue circuit reservoir with a simple cycle architecture suitable for complementary metal-oxide-semiconductor (CMOS) chip integration. In several benchmarks and demonstrations using synthetic and real-world data, our developed hardware prototype and its simulator exhibit a high prediction performance and sufficient memory capacity for practical applications, showing promise for future applications in highly integrated AI accelerators.

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