A Novel Atomic-Level Post-Etch-Surface-Reinforcement Process for High-Performance <i>p</i>-GaN Gate HEMTs Fabrication
Luyu Wang,
Penghao Zhang,
Kaiyue Zhu,
Qiang Wang,
Maolin Pan,
Xin Sun,
Ziqiang Huang,
Kun Chen,
Yannan Yang,
Xinling Xie,
Hai Huang,
Xin Hu,
Saisheng Xu,
Chunlei Wu,
Chen Wang,
Min Xu,
David Wei Zhang
Affiliations
Luyu Wang
State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China
Penghao Zhang
State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China
Kaiyue Zhu
Imperial College London, London SW7 2AZ, UK
Qiang Wang
State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China
Maolin Pan
State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China
Xin Sun
State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China
Ziqiang Huang
State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China
Kun Chen
State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China
Yannan Yang
State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China
Xinling Xie
State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China
Hai Huang
State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China
Xin Hu
State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China
Saisheng Xu
State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China
Chunlei Wu
State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China
Chen Wang
State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China
Min Xu
State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China
David Wei Zhang
State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China
A novel atomic-level post-etch-surface-reinforcement (PESR) process is developed to recover the p-GaN etching induced damage region for high performance p-GaN gate HEMTs fabrication. This process is composed of a self-limited surface modification step with O2 plasma, following by an oxide removal step with BCl3 plasma. With PESR process, the AlGaN surface morphology after p-GaN etching was comparable to the as-epitaxial level by AFM characterization, and the AlGaN lattice crystallization was also recovered which was measured in a confocal Raman system. The electrical measurement further confirmed the significant improvement of AlGaN surface quality, with one-order of magnitude lower surface leakage in a metal-semiconductor (MS) Schottky-diode and 6 times lower interface density of states (Dit) in a MIS C-V characterization. The XPS analysis of Al2O3/AlGaN showed that the p-GaN etching induced F-byproduct and Ga-oxide was well removed and suppressed by PESR process. Finally, the developed PESR process was successfully integrated in p-GaN gate HEMTs fabrication, and the device performance was significantly enhanced with ~20% lower of on-resistance and ~25% less of current collapse at Vds,Q bias of 40 V, showing great potential of leverage p-GaN gate HEMTs reliability.
