Ingeniería e Investigación (May 2017)

Model-based implementation of self-configurable intellectual property modules for image histogram calculation in FPGAs

  • Luis Manuel Garcés Socarrás,
  • Daniel Alejandro Romero Ares,
  • Alejandro José Cabrera Sarmiento,
  • Santiago Sánchez Solano,
  • Piedad Brox Jiménez

DOI
https://doi.org/10.15446/ing.investig.v37n2.62328
Journal volume & issue
Vol. 37, no. 2
pp. 74 – 81

Abstract

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This work presents the development of self-modifiable Intellectual Property (IP) modules for histogram calculation using the modelbased design technique provided by Xilinx System Generator. In this work, an analysis and a comparison among histogram calculation architectures are presented, selecting the best solution for the design flow used. Also, the paper emphasizes the use of generic architectures capable of been adjustable by a self configurable procedure to ensure a processing flow adequate to the application requirements. In addition, the implementation of a configurable IP module for histogram calculation using a model-based design flow is described and some implementation results are shown over a Xilinx FPGA Spartan-6 LX45.

Keywords