IEEE Access (Jan 2024)

Performance and Computational Efficiency of LMS Adaptive Volterra Equalizers for Nonlinear TWTA Distortion in Satellite Communications

  • Jerome J. Malone,
  • Byeong Kil Lee

DOI
https://doi.org/10.1109/ACCESS.2024.3475250
Journal volume & issue
Vol. 12
pp. 149740 – 149759

Abstract

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Traveling-wave tube amplifiers are widely used in satellite communication systems, but introduce severe intermodulation distortion when operated at peak efficiency. In this paper, we examine the performance of fully-coupled and partially-decoupled LMS adaptive Volterra equalizers in mitigating intersymbol interference in digitally-modulated signals subject to this distortion in bent-pipe satellite communication systems (i.e., systems in which equalization takes place in the receiver). Adaptive Volterra equalization was found to be more effective than linear equalization alone when channel memory is relatively low and signal-to-distortion ratio is relatively high. The adaptive Volterra equalizer was found to match the nonlinear channel more closely than a conventional receiver matched filter. While linear and cubic Volterra kernels are needed for equalization of M-PSK modulation schemes, inclusion of a quintic kernel did not significantly help in equalizing BPSK, QPSK, or 8-PSK, but slightly improved equalization of 16-QAM (~0.5 dB at 3 dB IBO) over and above that obtained with linear and cubic kernels. Using typical to severe values for channel memory, optimum linear equalizer memory for BPSK was found to be four; no optimum cubic memory length was found. Optimum memory for equalization of QPSK, 8-PSK, and 16-QAM was found to be four linear and four or five cubic memory units. Difference in performance between fully-coupled and partially-decoupled adaptive equalizers was found to be small, rarely exceeding ~1.5 dB mean-square error. Because implementation of any Volterra filter incurs a high computational burden, there is great incentive to increase computational efficiency. Three practical strategies for increasing computational efficiency were explored: convolution-sum factoring, elimination of redundant kernel coefficients by symmetry restriction, and use of “simplified” kernels containing relatively few cubic and/or quintic coefficients. These strategies make implementation of a Volterra equalizer on an FPGA feasible. Exact polynomial expressions in memory units for computational burden were derived for these efficient forms.

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