Design of Low Inductance SiC-MOS/Si-IGBT Hybrid Module for PV Inverters

Abstract

In this paper, design of a low parasitic inductance T-type SiC-MOS/Si-IGBT hybrid module for PV inverters is studied. Current commutation loops and self- and mutual inductances model of the hybrid module are analyzed. Then stacked substrates structures with vertical power commutation loop to reduce parasitic inductance are identified and compared. Finally, a hybrid module with stacked bond wire substrates structure is built and test results are provided to verify the design.

Keywords

• Hybrid module
• stacked bond wire substrates
• parasitic inductance
• inverter