Experimental Assessment on the Use of Power Semiconductor Filtering Technique in Grid-Connected Inverter

Abstract

An experimental assessment on the use of power semiconductor filtering technique in grid-connected inverter is presented. The idea is based on introducing a series pass device (SPD) between the point of common coupling (PCC) and the output of a full bridge to regulate the current output to the PCC, where the output pulses of the full bridge are unipolar pulse-width modulated. By adjusting the biasing condition of the SPD, the magnitude of the PCC current is dynamically adjusted. To minimize power loss of the SPD, the operation of the SPD is optimized by controlling the output voltage of the full bridge to operate close to the “knee point” of the voltage-current characteristic of the SPD. Such configuration allows the SPD to function as a current source, mitigating the impact of grid impedance on the overall system stability. To validate the effectiveness of the proposed approach, a 347W, 110Vac / 250Vdc, 60Hz prototype utilizing a SiC Junction Transistor as the SPD has been constructed and evaluated. The experimental results closely align with the theoretical predictions.

Keywords

• DC-AC power conversion
• micro-inverter
• output current harmonics
• output filtering
• power semiconductor filter (PSF)
• wide-bandgap semiconductor