TPCSA-MRAM: Ternary Precharge Sense Amplifier-Based MRAM

Abstract

The emerging multi-value logic technology in memory systems has increased data storage capacity and power efficiency. In this paper, to address the power consumption challenge of ternary memory, a ternary precharge sense amplifier (TPCSA)-based magnetic random-access memory (MRAM) is designed and simulated for the first time. The proposed TPCSA-MRAM leverages both low power consumption and high performance of TPCSA-based memory and nonvolatility of the magnetic tunnel junction (MTJ). The proposed TPCSA-MRAM also offers high resilience against process variation, which is critical in the ternary circuits. This process variation resilience is validated through Monte Carlo and process corners simulations. A ternary memory array architecture is also designed and simulated based on the proposed design to show the scalability of the proposed TPCSA-MRAM. Detailed post-layout simulations using the 7nm FinFET technology as an industrially available technology for digital circuit fabrication indicate that the proposed design’s read and write energy is up to 80% and 37% lower than the existing nonvolatile ternary memories.

Keywords

• MRAM architecture
• nonvolatility
• spintronics
• ternary logic