IEEE Photonics Journal (Jan 2020)

Electrically Erasable Optical I/O for Wafer Scale Testing of Silicon Photonic Integrated Circuits

  • Xingshi Yu,
  • Xia Chen,
  • Milan M. Milosevic,
  • Xingzhao Yan,
  • Shinichi Saito,
  • Graham T. Reed

DOI
https://doi.org/10.1109/JPHOT.2020.3027799
Journal volume & issue
Vol. 12, no. 5
pp. 1 – 8

Abstract

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A technique for realizing electrically erasable photonics devices using micro-heaters for localized annealing of lattice defects in silicon is presented. The lattice defects have previously been introduced by ion implantation in order to cause a refractive index change. This technique can be used to fabricate electrically erasable on-chip directional couplers (DCs) and Mach-Zehnder Interferometer (MZI) switches. These devices can be used for wafer scale testing of photonics circuits, allowing testing of individual optical components in a complex photonic integrated circuit, or components for programmable optical circuits, whilst inducing negligible additional optical loss when erased electrically. In this paper, we report the designs and experimental results of fully, rapidly annealing of these devices.

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