Performance Characterization and Majority Gate Design for MESO-Based Circuits

Zhaoxin Liang; Meghna G. Mankalale; Jiaxi Hu; Zhengyang Zhao; Jian-Ping Wang; Sachin S. Sapatnekar

doi:10.1109/JXCDC.2018.2874805

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (Jan 2018)

Performance Characterization and Majority Gate Design for MESO-Based Circuits

Zhaoxin Liang,
Meghna G. Mankalale,
Jiaxi Hu,
Zhengyang Zhao,
Jian-Ping Wang,
Sachin S. Sapatnekar

Affiliations

Zhaoxin Liang: ORCiD; Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA
Meghna G. Mankalale: ORCiD; Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA
Jiaxi Hu: ORCiD; Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA
Zhengyang Zhao: ORCiD; Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA
Jian-Ping Wang: Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA
Sachin S. Sapatnekar: ORCiD; Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA

DOI: https://doi.org/10.1109/JXCDC.2018.2874805
Journal volume & issue: Vol. 4, no. 2
pp. 51 – 59

Abstract

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Magnetoelectric spin-orbit (MESO) logic is a promising spin-based post-CMOS logic computation paradigm. This paper explores the application of the basic MESO device concept to more complex logic structures. A simulation framework is first developed to facilitate the performance evaluation of MESO-based circuits. Based on the analysis, it is seen that inadvertent logic errors may potentially be introduced in cascaded MESO stages due to sneak paths, and solutions for overcoming this problem with a short pulse and two-phase evaluation are discussed. Next, the generalization of the MESO inverter structure to majority logic gates is shown. Two implementations, based on different physical mechanisms, are presented and a relative analysis of their speed and power characteristics is provided.

Published in IEEE Journal on Exploratory Solid-State Computational Devices and Circuits

ISSN: 2329-9231 (Online)
Publisher: IEEE
Country of publisher: United States
LCC subjects: Technology: Electrical engineering. Electronics. Nuclear engineering: Electronics: Computer engineering. Computer hardware
Website: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6570653

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