Simulation of Electrical Parameters for Ru/Ta2O5/SiO2/Si(p) High-k MOS Structure

Abstract

The contribution presents the results of simulation of direct tunnelling of free charge carriers through a thin gateinsulator in MOS structures consisting of a Ta2O5/SiO2 bilayer taking into account also indirect tunnelling of free chargecarriers through the SiO2/Si interface traps. The calculated I–V and C–V curves reveal the processes of electron and holetunnelling through the insulator-to-semiconductor potential barrier that can be divided into four classes.

Keywords

• mos structure
• c-v curves
• sio2
• semiconductor.