Sensors (Dec 2021)

The SALT—Readout ASIC for Silicon Strip Sensors of Upstream Tracker in the Upgraded LHCb Experiment

  • Carlos Abellan Beteta,
  • Dimitra Andreou,
  • Marina Artuso,
  • Andy Beiter,
  • Steven Blusk,
  • Roma Bugiel,
  • Szymon Bugiel,
  • Antonio Carbone,
  • Ina Carli,
  • Bo Chen,
  • Nadim Conti,
  • Federico De Benedetti,
  • Shuchong Ding,
  • Scott Ely,
  • Miroslaw Firlej,
  • Tomasz Fiutowski,
  • Paolo Gandini,
  • Danielle Germann,
  • Nathan Grieser,
  • Marek Idzik,
  • Xiaojie Jiang,
  • Wojciech Krupa,
  • Yiming Li,
  • Zhuoming Li,
  • Xixin Liang,
  • Shuaiyi Liu,
  • Yu Lu,
  • Lauren Mackey,
  • Jakub Moron,
  • Ray Mountain,
  • Marco Petruzzo,
  • Hang Pham,
  • Burkhard Schmidt,
  • Shuqi Sheng,
  • Elisabetta Spadaro Norella,
  • Krzysztof Swientek,
  • Tomasz Szumlak,
  • Mark Tobin,
  • Jianchun Wang,
  • Michael Wilkinson,
  • Hangyi Wu,
  • Feihao Zhang,
  • Quan Zou

DOI
https://doi.org/10.3390/s22010107
Journal volume & issue
Vol. 22, no. 1
p. 107

Abstract

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SALT, a new dedicated readout Application Specific Integrated Circuit (ASIC) for the Upstream Tracker, a new silicon detector in the Large Hadron Collider beauty (LHCb) experiment, has been designed and developed. It is a 128-channel chip using an innovative architecture comprising a low-power analogue front-end with fast pulse shaping and a 40 MSps 6-bit Analog-to-Digital Converter (ADC) in each channel, followed by a Digital Signal Processing (DSP) block performing pedestal and Mean Common Mode (MCM) subtraction and zero suppression. The prototypes of SALT were fabricated and tested, confirming the full chip functionality and fulfilling the specifications. A signal-to-noise ratio of about 20 is achieved for a silicon sensor with a 12 pF input capacitance. In this paper, the SALT architecture and measurements of the chip performance are presented.

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