Experimental and Modeling Study on the High-Performance p<sup>++</sup>-GaAs/n<sup>++</sup>-GaAs Tunnel Junctions with Silicon and Tellurium Co-Doped InGaAs Quantum Well Inserted
Yudan Gou,
Jun Wang,
Yang Cheng,
Yintao Guo,
Xiao Xiao,
Heng Liu,
Shaoyang Tan,
Li Zhou,
Huomu Yang,
Guoliang Deng,
Shouhuan Zhou
Affiliations
Yudan Gou
College of Electronics and Information Engineering, Sichuan University, Chengdu 610065, China
Jun Wang
College of Electronics and Information Engineering, Sichuan University, Chengdu 610065, China
Yang Cheng
Suzhou Everbright Photonics Co., Ltd., Suzhou 215000, China
Yintao Guo
Suzhou Everbright Photonics Co., Ltd., Suzhou 215000, China
Xiao Xiao
Suzhou Everbright Photonics Co., Ltd., Suzhou 215000, China
Heng Liu
Suzhou Everbright Photonics Co., Ltd., Suzhou 215000, China
Shaoyang Tan
Suzhou Everbright Photonics Co., Ltd., Suzhou 215000, China
Li Zhou
Suzhou Everbright Photonics Co., Ltd., Suzhou 215000, China
Huomu Yang
College of Electronics and Information Engineering, Sichuan University, Chengdu 610065, China
Guoliang Deng
College of Electronics and Information Engineering, Sichuan University, Chengdu 610065, China
Shouhuan Zhou
College of Electronics and Information Engineering, Sichuan University, Chengdu 610065, China
The development of high-performance tunnel junctions is critical for achieving high efficiency in multi-junction solar cells (MJSC) that can operate at high concentrations. We investigate silicon and tellurium co-doping of InGaAs quantum well inserts in p++-GaAs/n++-GaAs tunnel junctions and report a peak current density as high as 5839 A cm−2 with a series resistance of 5.86 × 10−5 Ω cm2. In addition, we discuss how device performance is affected by the growth temperature, thickness, and V/III ratio in the InGaAs layer. A simulation model indicates that the contribution of trap-assisted tunneling enhances carrier tunneling.
