Software for Explicitly Parallel Memory-Centric Processor Architect

Abstract

Advances in computer memory technology justify research towards new and different views on computer organization. This paper proposes a novel memory-centric computing architecture with the goal to merge memory and processing elements in order to provide better conditions for parallelization and performance. The paper introduces the architectural concepts and afterwards shows the design and implementation of a corresponding assembler and simulator.

Keywords

• explicit parallelism
• memory-centric
• highperformance computing
• assembler
• simulator