Impact of the channel length on molybdenum disulfide field effect transistors with hafnia-based high-k dielectric gate
Yanxiao Sun,
Gang Niu,
Wei Ren,
Jinyan Zhao,
Yankun Wang,
Heping Wu,
Luyue Jiang,
Liyan Dai,
Ya-Hong Xie,
Pedro Rojo Romeo,
Jordan Bouaziz,
Bertrand Vilquin
Affiliations
Yanxiao Sun
Electronic Materials Research Laboratory, Key Laboratory of the Ministry of Education and International Center for Dielectric Research, School of Electronic Science and Engineering, Xi’an Jiaotong University, No. 28, Xianning West Road, Xi’an 710049, Shaanxi, People’s Republic of China
Gang Niu
Electronic Materials Research Laboratory, Key Laboratory of the Ministry of Education and International Center for Dielectric Research, School of Electronic Science and Engineering, Xi’an Jiaotong University, No. 28, Xianning West Road, Xi’an 710049, Shaanxi, People’s Republic of China
Wei Ren
Electronic Materials Research Laboratory, Key Laboratory of the Ministry of Education and International Center for Dielectric Research, School of Electronic Science and Engineering, Xi’an Jiaotong University, No. 28, Xianning West Road, Xi’an 710049, Shaanxi, People’s Republic of China
Jinyan Zhao
Electronic Materials Research Laboratory, Key Laboratory of the Ministry of Education and International Center for Dielectric Research, School of Electronic Science and Engineering, Xi’an Jiaotong University, No. 28, Xianning West Road, Xi’an 710049, Shaanxi, People’s Republic of China
Yankun Wang
Electronic Materials Research Laboratory, Key Laboratory of the Ministry of Education and International Center for Dielectric Research, School of Electronic Science and Engineering, Xi’an Jiaotong University, No. 28, Xianning West Road, Xi’an 710049, Shaanxi, People’s Republic of China
Heping Wu
Electronic Materials Research Laboratory, Key Laboratory of the Ministry of Education and International Center for Dielectric Research, School of Electronic Science and Engineering, Xi’an Jiaotong University, No. 28, Xianning West Road, Xi’an 710049, Shaanxi, People’s Republic of China
Luyue Jiang
Electronic Materials Research Laboratory, Key Laboratory of the Ministry of Education and International Center for Dielectric Research, School of Electronic Science and Engineering, Xi’an Jiaotong University, No. 28, Xianning West Road, Xi’an 710049, Shaanxi, People’s Republic of China
Liyan Dai
Electronic Materials Research Laboratory, Key Laboratory of the Ministry of Education and International Center for Dielectric Research, School of Electronic Science and Engineering, Xi’an Jiaotong University, No. 28, Xianning West Road, Xi’an 710049, Shaanxi, People’s Republic of China
Ya-Hong Xie
Department of Materials Science and Engineering, University of California, Los Angeles, Los Angeles, California 90024, USA
Pedro Rojo Romeo
Université de Lyon, Institut des Nanotechnologies de Lyon (UMR5270/CNRS), Ecole Centrale de Lyon, 36 Avenue Guy de Collongue, F-69134 Ecully Cedex, France
Jordan Bouaziz
Université de Lyon, Institut des Nanotechnologies de Lyon (UMR5270/CNRS), Ecole Centrale de Lyon, 36 Avenue Guy de Collongue, F-69134 Ecully Cedex, France
Bertrand Vilquin
Université de Lyon, Institut des Nanotechnologies de Lyon (UMR5270/CNRS), Ecole Centrale de Lyon, 36 Avenue Guy de Collongue, F-69134 Ecully Cedex, France
Field effect transistors (FETs) using two-dimensional molybdenum disulfide (MoS2) as the channel material has been considered one of the most potential candidates for future complementary metal-oxide-semiconductor technology with low power consumption. However, the understanding of the correlation between the device performance and material properties, particularly for devices with scaling-down channel lengths, is still insufficient. We report in this paper back-gate FETs with chemical-vapor-deposition grown and transferred MoS2 and Zr doped HfO2 ((Hf,Zr)O2, HZO) high-k dielectric gates with channel lengths ranging from 10 to 30 µm with a step of 5 µm. It has been demonstrated that channels with the length to width ratio of 0.2 lead to the most superior performance of the FETs. The MoS2/HZO hybrid FETs show a stable threshold voltage of ∼1.5 V, current on/off ratio of >104, and field effect mobility in excess of 0.38 cm2 V−1 s−1. The impact of the channel lengths on FET performance is analyzed and discussed in depth. A hysteresis loop has been observed in the Ids − Vgs characteristics of the hybrid FETs, which has been further studied and attributed to the charge effect at the interfaces. The HZO films show a relatively weak ferroelectric orthorhombic phase and thus serve mainly as the high-k dielectric gate. Charge trapping in the HZO layer that might induce hysteresis has been discussed. Our results show that MoS2/HZO hybrid FETs possess great potential in future low power and high-speed integrated circuits, and future work will focus on further improvement of the transistor performances using ferroelectric HZO films and the study of devices with even shorter MoS2 channels.