Linear Active Disturbance Rejection Control Strategy with Known Disturbance Compensation for Voltage-Controlled Inverter

Abstract

When the linear active disturbance rejection control (LADRC) is applied for the voltage-controlled inverter, the discrete period and the measurement noise limits the observer bandwidth, which affects the anti-disturbance performance of the system. This results in a poor ability to deal with the output voltage fluctuation under the load switch. In this paper, a novel LADRC strategy based on the known disturbance compensation is proposed for the voltage-controlled inverters. Firstly, the original LADRC scheme is designed. The dynamic performance and robustness of the system are analyzed by a root locus diagram, and the anti-disturbance ability is studied through amplitude-frequency characteristics. Then the partial model information and the load current are treated as the known disturbance and introduced to the linear extended state observer (LESO) to improve observation accuracy. The difference in anti-disturbance performance with the original scheme is compared and the stability of the LESO and LADRC is analyzed. Finally, the effectiveness of the proposed scheme is verified by the simulation and experimental results.

Keywords

• linear active disturbance rejection control (LADRC)
• voltage-controlled inverter
• linear extended state observer (LESO)
• model information
• load current
• anti-disturbance ability