An Investigation of Gate Voltage Oscillation and its Suppression for SiC MOSFET

Abstract

Silicon Carbide (SiC) MOSFET has undergone a rapid development and commercialization in recent years due to its superior features. However, the mainstream commercial SiC MOFESTs are often fitted to packages that are previously designed for silicon-based devices, which brings oscillation issues at faster switching speed. This paper investigates the gate oscillation based on the parasitic parameter analysis of equivalent SiC MOSFET circuit, where the influences of di/dt and dv/dt are discussed and compared. Moreover, the paper recommends a guideline for the acceptable gate oscillation for SiC MOSFET based on the data from manufacturers and carries out detailed comparisons of the conventional gate driver tuning methods. It is found that the external gate-source capacitor provides better switching performance and gate oscillation suppression than the tuning of gate resistor. The analysis and the switching performance are verified from the experimental results based on Cree CAS300M12BM2 SiC MOSFET Module.

Keywords

• SiC MOSFET
• equivalent circuit model
• gate oscillation
• di/dt and dv/dt feedback
• double-pulse-test