IEEE Access (Jan 2024)

A Wide-Dynamic-Range, DC-Coupled, Time-Based Neural-Recording IC With Optimized CCO Frequency

  • Donghyun Youn,
  • Youngin Kim,
  • Injun Choi,
  • Yoontae Jung,
  • Hyuntak Jeon,
  • Kyungtae Lee,
  • Soon-Jae Kweon,
  • Sohmyung Ha,
  • Minkyu Je

DOI
https://doi.org/10.1109/ACCESS.2024.3424228
Journal volume & issue
Vol. 12
pp. 94354 – 94366

Abstract

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This paper presents a wide-dynamic-range, DC-coupled, time-based neural-recording integrated circuit (IC), which is resilient against stimulation artifacts, for bidirectional neural interfaces. The proposed neural-recording IC based on delta-sigma modulation consists of an input Gm cell, current-controlled oscillator (CCO)-based integrator, phase quantizer, and tri-level current-steering DACs. The feedback current-steering DACs embedded in the current sources of the input Gm cell enable the recording IC to achieve a wide enough dynamic range to directly digitize the neural signals on top of stimulation artifacts while maintaining a moderately high input impedance. Moreover, the free-running frequency of the CCO-based integrator is set to be the optimum frequency of 0.49 times the sampling rate, thereby achieving high loop gain while utilizing inherent clocked averaging (CLA). Designed and post-layout simulated in a 65-nm process, the neural-recording IC achieves an SNDR of 76.3 dB over a signal bandwidth of 10 kHz while consuming low power of $5.04~\mu $ W with a sufficiently wide linear input range of 200 mVPP.

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