On Model Order Reduction of Interconnect Circuit Network: A Fast and Accurate Method

Abstract

The time cost in integrated circuit simulation is an important consideration in the design. This paper investigates the model order reduction of interconnect circuit networks to facilitate numerical analysis. A novel fast and accurate time reduced order model is proposed to simplify the interconnection network structure analysis and perform a fast simulation. The novelty of this study is the use of the power function sum to extend the approximate function to replace the original system’s state function. We give several simulations to verify the effectiveness of the algorithm. The innovation of this model is due to its use of the approximate function of power series expansion to replace the state function of the original system.

Keywords

• model reduction
• state variable analysis method
• square error