Single-Stage Injection-Locked Frequency Sixtupler in CMOS Process

Abstract

High multiplication-factor even-modulus frequency multipliers are often configured as multi series frequency multipliers. This paper designs a single-stage $LC$ -tank injection locked frequency sixtupler (ILFS) fabricated in $0.18~\mu \text{m}$ CMOS process and the ILFS merges many sub-circuits in one by sharing a common supply and passive inductive elements. The circuit design, operation principle and measurement results of the ILFS are addressed. The differential input and single-phase output ILFS circuit is made of two frequency doublers, a first-harmonic injection-locked oscillator and an active frequency tripler using one frequency doubler. The free-running oscillation frequency of the ILO is around 5.716 GHz. At the dc power consumption of 20.9 mW and at the incident power of 0 dBm, the $\times 6$ input locking range is from the incident frequency 0.94 GHz to 1.02 GHz to provide an output signal source from the frequency 5.64 GHz to 6.12 GHz. The whole chip occupies a die area of $1.141\times 1.2$ mm2. Other high multiplier factors are also measured on the designed chip.

Keywords

• Frequency doubler
• frequency tripler
• injection-locked frequency sixtupler
• locking range
• phase noise