Editorial for the Special Issue on Advanced Interconnect and Packaging
Wen-Sheng Zhao
Affiliations
Wen-Sheng Zhao
Zhejiang Provincial Key Lab of Large-Scale Integrated Circuit Design, School of Electronics and Information, Hangzhou Dianzi University, Hangzhou 310018, China
Unlike transistors, the continuous downscaling of feature size in CMOS technology leads to a dramatic rise in interconnect resistivity and concomitant performance degradation [...]
