High-Performance Computing Architecture for Sample Value Processing in the Smart Grid

Abstract

The digitalization of the Electric Grid is a continuous process, both for operational and user networks. For example, in the energy transport infrastructures, the Ethernet broadcasting of digitalized current and voltage values for control and protection applications is a reality to share data with the newest digital power substations. However, emerging applications such as Distributed Energy Resources (DER) system coordination, Electric Transmission Lines continuous monitoring, and Power Quality assessment demand virtual technologies capable of processing a significant amount of these current and voltage streams measured in multiple and distributed locations in real-time. Concurrently, High-Performance Computing (HPC) increases its capabilities and reduces its costs, making it suitable for semi-distributed systems, such as the Smart Grid (SG). This article presents an innovative solution to accelerate the computation of hundreds of streams, combining a custom-designed silicon Intellectual Property (IP) and a new generation Field Programmable Gate Array (FPGA)-based accelerator card. This solution overcomes the computation and networking limitations of the state-of-the-art solutions based on distributed Intelligent Electronic Devices (IED) or Central Processing Unit (CPU)-based servers and uncovers the Sample Measured Value (SMV) processing complexity. It offers a high-level interface for the application designers.

Keywords

• Field programmable gate arrays
• high-performance computing
• Smart Grid (SG)