A nested DC offset cancellation circuit based on negative feedback technique

Abstract

Based on the UMC 40 nm CMOS process, a programmable gain amplifier(PGA) with DC offset cancellation circuit(DCOC) is designed. The PGA adopts a closed-loop resistance negative feedback structure and consists of a cascade of two gain units. DCOC circuit is based on the traditional DC negative feedback structure, a nested feedback method is proposed to reduce the power consumption and area of DCOC circuit. The simulation results show that within the gain variation control range of 0～52 dB, the high pass cutoff frequency and the relative inhibition degree of DCOC are constant at 10 kHz and 50 dB,and the maximum correctable input misalignment at 0 dB is 110 mV. Compared with the traditional design method, the area of DCOC has been reduced by almost half.

Keywords

• dc offset cancellation
• nested feedback
• programmable gain amplifier