IEEE Open Journal of the Industrial Electronics Society (Jan 2024)

Review and Analysis of Voltage Clamping Circuits With Low Overvoltage Ratios for DC Circuit Breakers

  • Shuyan Zhao,
  • Chunmeng Xu,
  • Lakshmi Ravi,
  • Zhou Dong,
  • Pietro Cairoli

DOI
https://doi.org/10.1109/OJIES.2024.3420219
Journal volume & issue
Vol. 5
pp. 651 – 662

Abstract

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Voltage clamping circuits are critical components in most direct-current circuit breakers (dcCBs) to achieve ultrafast dc fault interruptions and an extended lifetime. A key performance index of voltage clamping circuits is the overvoltage ratio, which calculates the peak switching overvoltage over the nominal voltage during fault interruption processes. A lower overvoltage ratio is beneficial to minimize the dcCB insulation voltage and reduce the total breaker cost, meanwhile alleviating the overvoltage interference to the dc bus and, thus, enhancing the stability of the dc power system. This article evaluates the overvoltage ratio of various clamping circuits reported in dcCB literature. The basic working principles, switching overvoltage magnitude, advantages, and limitations of different voltage clamping circuits are evaluated by circuit simulations. A capacitor-metal–oxide varistor (C-MOV) circuit is selected for experimental validation considering its specifically low overvoltage ratio. The C-MOV prototype is verified with high-power tests at 1 kV dc bus. The measured overvoltage ratio of the C-MOV prototype matches parametric analyses. The effects of stray inductance and fault rise rate on the overvoltage ratio are also experimentally validated. Finally, the C-MOV circuit is compared with other voltage clamping circuits in the literature to demonstrate its benefits and limitations in dcCB applications.

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