On-Wafer Measurements for Extraction of Effective Dielectric Constant in IC Transmission Lines on Multilayer Substrates

Abstract

Methodology for extracting an effective dielectric constant of microstrip transmission lines on multilayer substrates, from measured or simulated S-parameters data, using on-chip test structures, has been demonstrated. The methodology consists of: 1) building on-chip interconnect structures usually implemented in calibration and de-embedding procedures in microwave on-wafer test and measurements – transmission lines, stubs and pad launchers; 2) extracting the effective dielectric constant from the characteristic impedance and propagation constant of these structures, fully described by the measured or EM-simulated S-parameters. The demonstrated methodology is applicable for evaluation of dielectric and semiconductor multilayer substrates, both with lossy and lossless characteristics over a broad frequency band. Another advantage is implementation of very short transmission line structures with physical dimensions much smaller than a quarter wavelength of the highest investigated band frequency, thus preserving a valuable chip area in the test structures and being compatible with some of the calibration TRL elements.

Keywords

• Calibration and de-embedding structures
• characteristic impedance
• effective dielectric constant
• multilayer substrates
• on-wafer test and measurements
• propagation constant
• S-parameters