A low-power low-error single-ended virtually-grounded-drain class AB switched-current memory cell

Abstract

A low-power low-error single-ended virtually-grounded-drain class AB switched-current memory cell is presented. The proposed circuit is relatively simple, based on a basic class AB SI memory cell and a levelshiftedgrounded-gate amplifier. No large differential circuitry and complicated clocking schemes are required. All charge-injection, clock-feedthrough and conduction errors are reduced. As a design exampleusing 0.5-μm CMOS technology, the power consumption is 120 μW at the bias current of 25 μA and supply voltage of 2V. The optimal sampling frequency is at 45MHz. The SNR, SDR and SFDR are 59.7 dB, 61 dB and73 dB, respectively. The total harmonic distortion is less than 0.4%. The transmission gain error and the DC offset current error are less than 0.025 and 0.75 μA, respectively. Demonstrations of a forward differenceintegrator and comparisons to other approaches are also presented.

Keywords

• switched-current technique
• Class AB technique
• memory cell
• grounded-gate amplifier
• offset compensation
• charge injection
• conduction error
• low power
• low error.