A platform design of single event effect mitigation for SRAM-based FPGA

Abstract

Be aimed at application requirements of VLSI(very large scale integration) in space environment, current researching status in China and abroad of radiation harden of FPGA are introduced in the paper. With a simple description of space radiation environment and SEE(single event effect) and analyzing the structure and fault characteristics of SRAM-based FPGA, a hardware platform design of single event effect mitigation for configuration, monitoring, readback verification and Scrubbing of Xilinx Kintex-7 series FPGA based on HRU(high reliability unit) is proposed. The process of protecting Kintex-7 series FPGA and the composition of SEU injection test system are elaborated. The platform is used in a project and has passed functional testing and related environmental tests, and it has provided a design reference for space application of VLSI.

Keywords

• single event effect
• Kintex-7 FPGA
• radiation harden design
• scrubbing test