A simulation and verification method based on IBIS model for signal integrity of FPGA

Abstract

This paper analyzes the necessity of verifying the signal integrity of SRAM-based FPGAs, and a method based on simulation for verifying the signal integrity is proposed. Two series of SRAM-based FPGAs, which are Stratix-2 and Virtex-4 respectively, are verified for the signal integrity based on the IBIS model and the HyperLynx software. The results of simulation verification on the valid-data width, voltage amplitude and transmission rate are analyzed. As a result of verifying both FPGAs, the method based on the simulation is feasible for verifying the signal integrity of FPGAs. And also the model parameters are simulated and compared to obtain the difference between the intrinsic mechanism of signal integrity which guides the optimization of device signal integrity.

Keywords

• FPGA
• signal integrity
• simulation verification
• IBIS model
• HyperLynx software