Back-end-of-line a-SiOxCy:H dielectrics for resistive memory
J. Fan,
O. Kapur,
R. Huang,
S. W. King,
C. H. de Groot,
L. Jiang
Affiliations
J. Fan
School of Engineering, Faculty of Engineering and Physical Sciences, University of Southampton, Southampton SO17 1BJ, United Kingdom
O. Kapur
School of Electronics and Computer Science, Faculty of Engineering and Physical Sciences, University of Southampton, Southampton SO17 1BJ, United Kingdom
R. Huang
School of Electronics and Computer Science, Faculty of Engineering and Physical Sciences, University of Southampton, Southampton SO17 1BJ, United Kingdom
S. W. King
Logic Technology Development, Intel Corporation, Hillsboro, OR 97124, USA
C. H. de Groot
School of Electronics and Computer Science, Faculty of Engineering and Physical Sciences, University of Southampton, Southampton SO17 1BJ, United Kingdom
L. Jiang
School of Engineering, Faculty of Engineering and Physical Sciences, University of Southampton, Southampton SO17 1BJ, United Kingdom
Resistive switching of W/amorphous (a)-SiOxCy:H/Cu resistive memories incorporating solely native back-end-of-line (BEOL) materials were studied. A-SiC1.1:H, a-SiO0.9C0.7:H, and a-SiO1.5C0.2:H were exploited as switching layers for resistive memories which all show resistive-switching characteristics with ultrahigh ON/OFF ratios in the range of 106 to 1010. Ohmic conduction in the low resistance state is attributed to the formation of Cu conductive filament inside the a-SiOxCy:H switching layer. Rupture of the conductive filament leads to current conduction dominated by Schottky emission through a-SiOxCy:H Schottky contacts. Comparison of the switching characteristics suggests composition of the a-SiOxCy:H has influences on VFORM and VSET, and current conduction mechanisms. These results demonstrate the capability to achieve functional W/a-SiOxCy:H/Cu using entirely BEOL native materials for future embedded resistive memories.
